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ANSI-41 takes a much more simplified approach Although it is not formally described in any TIA document, we can consider the ANSI-41 stage 2 process to involve only two steps: ANSI-41 step 1 Use the ANSI-41 network reference model (described in 4) as the functional basis for providing the service Define new FEs only in cases where (a) the existing ANSI-41 FEs do not already encompass the required service-providing functions or (b) it is not desirable to add the required new functions to the existing ANSI-41 FEs When a new FE is required, the ANSI-41 network reference model must be updated The addition of authentication functions to ANSI-41 is an example of this step In this case, a new FE, called the authentication center (AC), was added to the ANSI-41 network reference model rather than add the required authentication functions to the HLR FE s responsibilities; conversely, authentication functions were added to the existing VLR FE rather than create yet another new FE ANSI-41 step 2 Describe the required information flows between FEs in terms of existing or proposed ANSI-41 messages and parameters, as opposed to the Q65 approach whereby an intermediate, abstract representation of the required information flows is defined and then mapped to actual messages and parameters in stage 3 Furthermore, ANSI-41 stage 2 information flow descriptions are in the form of pingpong diagrams, with accompanying text to describe what is happening in each step (see Figure 74) The more formal SDL diagram technique is not employed As we can see, the ANSI-41 approach to stage 2 is similar to that of Q65 in some aspects but different in others not necessarily better or worse, but definitely different Given its track record, we must assume that the approach is good enough for the job Stage 3 Protocols and Procedures The I130 goal of stage 3 the design of the messages, parameters, and procedures required for the service in question is common to the ANSI41 approach In fact, I130 does not go into any detail regarding message.

ation and the actual entity, then a mapping between the socket (component instantiation) and the chip (actual entity) is needed The actual chip to be mapped is described by the entity and architecture shown here:

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LIBRARY IEEE; USE IEEEstd_logic_1164ALL; ENTITY dff IS GENERIC( q_out, qb_out : time); PORT( preset, clear, din, PORT( clock : IN std_logic; PORT( q, qb : OUT std_logic); END dff; ARCHITECTURE behave OF dff IS BEGIN dff_proc : PROCESS(preset, clear, clock) VARIABLE int_q : std_logic; BEGIN IF preset = 0 and clear = 0 THEN IF (clock EVENT) AND (clock = 1 ) THEN int_q := din; END IF; ELSIF preset = 1 AND clear = 0 THEN int_q := 1 ; ELSIF clear = 1 AND preset = 0 THEN int_q := 0 ; ELSE int_q := X ; END IF; q <= int_q after q_out; int_q := not(int_q); qb <= int_q after qb_out; END PROCESS dff_proc; END behave;

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Figure 74 An example of the ANSI-41 approach to stage 2 The ping-pong diagrams describe signaling scenarios in terms of actual ANSI-41 messages, like LocationRequest, rather than in abstract terms A text description of each step accompanies the diagram For example: a A call origination is received by the originating MSC b The originating MSC sends a LocationRequest INVOKE message to the HLR associated with the called mobile station c The HLR determines the required call routing and returns this information to the originating MSC in the LocationRequest RETURN RESULT message

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The names of the ports and generics are completely different than the component declaration; therefore, mapping is required Following is a configuration that places the actual chip in the socket (maps the ports and generics):

formats and other presentation issues Thus, ANSI-41 can be considered to be an application of the I130 stage 3 process

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The ANSI-41 Revision D structure is virtually the same as its predecessor, IS-41 Revision C The IS-41-C structure, in turn, is based on the organization of its predecessors, IS-41 Revisions 0, A, and B, but with some significant deviations Therefore, it makes sense to discuss first the impact of functions on the structure of IS-41 IS-41 encompasses three main categories of functions: intersystem handoff; automatic roaming; and intersystem operations, administration, and maintenance

FOR U1,U2: dff USE WORKdff(behave) GENERIC MAP( q_out => g1, qb_out => g2) PORT MAP( preset => ground, clear => p3, PORT MAP( din => p2, clock => p1, PORT MAP( q => p5, qb => p6); END FOR; END FOR; END board_con;

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